Added CEP 2 Cores 2 & 5
Added CEP 2 Cores 2 & 5
This commit is contained in:
49
cep2_core5/zlc_a67.pwk
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49
cep2_core5/zlc_a67.pwk
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#MAXDOOR ASCII
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# model: PLC_J06_pwk
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filedependancy PlaceableObjects01.max
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node trimesh zlc_a67_wg
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parent zlc_a67_pwk
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position 0.0 0.0 0.0
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orientation 0.0 0.0 0.0 0.0
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wirecolor 0.52549 0.431373 0.0313726
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multimaterial 18
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NULL
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NULL
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NULL
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NULL
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NULL
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NULL
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NULL
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NULL
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NULL
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NULL
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NULL
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NULL
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NULL
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NULL
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NULL
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NULL
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NULL
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NULL
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bitmap NULL
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verts 4
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-0.506897 -0.75264 0.0
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0.506897 -0.75264 0.0
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-0.506897 0.75264 0.0
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0.506897 0.75264 0.0
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faces 2
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2 0 3 1 0 0 0 7
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1 3 0 1 0 0 0 7
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endnode
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node dummy a67_pwk_use02
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parent zlc_a67_pwk
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position -1.03736 -0.0179926 0.0
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orientation 0.0 0.0 0.0 0.0
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wirecolor 0.54902 0.345098 0.882353
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endnode
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node dummy a67_pwk_use01
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parent zlc_a67_pwk
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position 1.01695 -0.0179926 0.0
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orientation 0.0 0.0 0.0 0.0
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wirecolor 0.54902 0.345098 0.882353
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endnode
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