Added CEP 2 Cores 2 & 5
Added CEP 2 Cores 2 & 5
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18
cep2_core5/zlc_o73.pwk
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18
cep2_core5/zlc_o73.pwk
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#MAXDOOR ASCII
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# model: v_pillar_001_pwk
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filedependancy cc_int_placeables2.max
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node trimesh zlc_o73_wg
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parent zlc_o73_pwk
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position 0.0 0.0 0.0
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orientation 0.0 0.0 0.0 0.0
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wirecolor 0.552941 0.027451 0.227451
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bitmap NULL
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verts 4
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0.316901 -0.742496 0.0
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0.780028 0.305495 0.0
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-0.780028 -0.305495 0.0
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-0.316901 0.742496 0.0
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faces 2
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2 0 3 1 0 0 0 1
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1 3 0 1 0 0 0 1
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endnode
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